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ISRO RESPOND PROJECT
ISRO
Respond Project is Sponsored Project by SAC-ISRO
Ahmedabad at E.C Departmet, Nirma
University. The Tital of this Project is
Design & Development of 32 bit RISC
processor based IP core for Space
Application.The main objective of this
Project is as below.
Objectives
·
To develop FPGA based
platform of LEON 2/3 based Processor
·
To develop specification of 32
bit RISC Processor based IP core
·
To design RTL code of 32 bit
RISC Processor based IP core
·
To find out the ways of
implementing interface for IP core and it’s
implementation
on Hardware and Software of LEON Platform
·
To test and verify the
processor on FPGA Architecture
To optimize the processor for high
performance |
